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Implement put_pixels_clamped and add_pixels_clamped in Assembler. This
allows better scheduling of the memory accesses, and is portable among all compilers. Originally committed as revision 709 to svn://svn.ffmpeg.org/ffmpeg/trunk
This commit is contained in:
Falk Hüffner
parent
e09d12f4f6
commit
bb7d4939ba
@ -63,10 +63,11 @@ endif
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# alpha specific stuff
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ifeq ($(TARGET_ARCH_ALPHA),yes)
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OBJS += alpha/dsputil_alpha.o alpha/mpegvideo_alpha.o
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ASM_OBJS += alpha/dsputil_alpha_asm.o
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CFLAGS += -Wa,-mpca56
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endif
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SRCS := $(OBJS:.o=.c) $(ASM_OBJS:.o=.s)
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SRCS := $(OBJS:.o=.c) $(ASM_OBJS:.o=.S)
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OBJS := $(OBJS) $(ASM_OBJS)
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LIB= libavcodec.a
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@ -22,64 +22,86 @@
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void simple_idct_axp(DCTELEM *block);
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static void put_pixels_clamped_axp(const DCTELEM *block, UINT8 *pixels,
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int line_size)
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void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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int line_size);
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void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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int line_size);
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#if 0
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/* These functions were the base for the optimized assembler routines,
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and remain here for documentation purposes. */
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static void put_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels,
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int line_size)
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{
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int i = 8;
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uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */
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ASM_ACCEPT_MVI;
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do {
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UINT64 shorts;
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uint64_t shorts0, shorts1;
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shorts = ldq(block);
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shorts = maxsw4(shorts, 0);
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shorts = minsw4(shorts, WORD_VEC(0x00ff));
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stl(pkwb(shorts), pixels);
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shorts0 = ldq(block);
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shorts0 = maxsw4(shorts0, 0);
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shorts0 = minsw4(shorts0, clampmask);
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stl(pkwb(shorts0), pixels);
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shorts = ldq(block + 4);
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shorts = maxsw4(shorts, 0);
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shorts = minsw4(shorts, WORD_VEC(0x00ff));
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stl(pkwb(shorts), pixels + 4);
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shorts1 = ldq(block + 4);
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shorts1 = maxsw4(shorts1, 0);
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shorts1 = minsw4(shorts1, clampmask);
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stl(pkwb(shorts1), pixels + 4);
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pixels += line_size;
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block += 8;
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pixels += line_size;
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block += 8;
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} while (--i);
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}
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static void add_pixels_clamped_axp(const DCTELEM *block, UINT8 *pixels,
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int line_size)
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void add_pixels_clamped_mvi(const DCTELEM *block, uint8_t *pixels,
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int line_size)
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{
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int i = 8;
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int h = 8;
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/* Keep this function a leaf function by generating the constants
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manually (mainly for the hack value ;-). */
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uint64_t clampmask = zap(-1, 0xaa); /* 0x00ff00ff00ff00ff */
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uint64_t signmask = zap(-1, 0x33);
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signmask ^= signmask >> 1; /* 0x8000800080008000 */
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ASM_ACCEPT_MVI;
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do {
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UINT64 shorts;
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uint64_t shorts0, pix0, signs0;
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uint64_t shorts1, pix1, signs1;
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shorts = ldq(block);
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shorts &= ~WORD_VEC(0x8000); /* clear highest bit to avoid overflow */
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shorts += unpkbw(ldl(pixels));
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shorts &= ~WORD_VEC(0x8000); /* hibit would be set for e. g. -2 + 3 */
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shorts = minuw4(shorts, WORD_VEC(0x4000)); /* set neg. to 0x4000 */
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shorts &= ~WORD_VEC(0x4000); /* ...and zap them */
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shorts = minsw4(shorts, WORD_VEC(0x00ff)); /* clamp to 255 */
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stl(pkwb(shorts), pixels);
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shorts0 = ldq(block);
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shorts1 = ldq(block + 4);
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/* next 4 */
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shorts = ldq(block + 4);
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shorts &= ~WORD_VEC(0x8000);
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shorts += unpkbw(ldl(pixels + 4));
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shorts &= ~WORD_VEC(0x8000);
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shorts = minuw4(shorts, WORD_VEC(0x4000));
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shorts &= ~WORD_VEC(0x4000);
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shorts = minsw4(shorts, WORD_VEC(0x00ff));
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stl(pkwb(shorts), pixels + 4);
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pix0 = unpkbw(ldl(pixels));
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/* Signed subword add (MMX paddw). */
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signs0 = shorts0 & signmask;
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shorts0 &= ~signmask;
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shorts0 += pix0;
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shorts0 ^= signs0;
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/* Clamp. */
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shorts0 = maxsw4(shorts0, 0);
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shorts0 = minsw4(shorts0, clampmask);
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pixels += line_size;
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block += 8;
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} while (--i);
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/* Next 4. */
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pix1 = unpkbw(ldl(pixels + 4));
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signs1 = shorts1 & signmask;
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shorts1 &= ~signmask;
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shorts1 += pix1;
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shorts1 ^= signs1;
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shorts1 = maxsw4(shorts1, 0);
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shorts1 = minsw4(shorts1, clampmask);
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stl(pkwb(shorts0), pixels);
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stl(pkwb(shorts1), pixels + 4);
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pixels += line_size;
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block += 8;
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} while (--h);
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}
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#endif
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/* Average 8 unsigned bytes in parallel: (b1 + b2) >> 1
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Since the immediate result could be greater than 255, we do the
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@ -222,7 +244,7 @@ void dsputil_init_alpha(void)
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/* amask clears all bits that correspond to present features. */
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if (amask(AMASK_MVI) == 0) {
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put_pixels_clamped = put_pixels_clamped_axp;
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add_pixels_clamped = add_pixels_clamped_axp;
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put_pixels_clamped = put_pixels_clamped_mvi_asm;
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add_pixels_clamped = add_pixels_clamped_mvi_asm;
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}
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}
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176
libavcodec/alpha/dsputil_alpha_asm.S
Normal file
176
libavcodec/alpha/dsputil_alpha_asm.S
Normal file
@ -0,0 +1,176 @@
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/*
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* Alpha optimized DSP utils
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* Copyright (c) 2002 Falk Hueffner <falk@debian.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*
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* These functions are scheduled for pca56. They should work
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* reasonably on ev6, though.
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*/
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#include "regdef.h"
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/* Some nicer register names. */
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#define ta t10
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#define tb t11
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#define tc t12
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#define td AT
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/* Danger: these overlap with the argument list and the return value */
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#define te a5
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#define tf a4
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#define tg a3
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#define th v0
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.set noat
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.set noreorder
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.arch pca56
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.text
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/************************************************************************
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* void put_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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* int line_size)
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*/
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.align 6
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.globl put_pixels_clamped_mvi_asm
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.ent put_pixels_clamped_mvi_asm
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put_pixels_clamped_mvi_asm:
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.frame sp, 0, ra
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.prologue 0
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lda t8, -1
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lda t9, 8 # loop counter
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zap t8, 0xaa, t8 # 00ff00ff00ff00ff
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.align 4
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1: ldq t0, 0(a0)
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ldq t1, 8(a0)
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ldq t2, 16(a0)
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ldq t3, 24(a0)
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maxsw4 t0, zero, t0
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subq t9, 2, t9
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maxsw4 t1, zero, t1
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lda a0, 32(a0)
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maxsw4 t2, zero, t2
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addq a1, a2, ta
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maxsw4 t3, zero, t3
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minsw4 t0, t8, t0
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minsw4 t1, t8, t1
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minsw4 t2, t8, t2
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minsw4 t3, t8, t3
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pkwb t0, t0
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pkwb t1, t1
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pkwb t2, t2
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pkwb t3, t3
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stl t0, 0(a1)
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stl t1, 4(a1)
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addq ta, a2, a1
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stl t2, 0(ta)
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stl t3, 4(ta)
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bne t9, 1b
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ret
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.end put_pixels_clamped_mvi_asm
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/************************************************************************
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* void add_pixels_clamped_mvi_asm(const DCTELEM *block, uint8_t *pixels,
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* int line_size)
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*/
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.align 6
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.globl add_pixels_clamped_mvi_asm
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.ent add_pixels_clamped_mvi_asm
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add_pixels_clamped_mvi_asm:
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.frame sp, 0, ra
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.prologue 0
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lda t1, -1
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lda th, 8
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zap t1, 0x33, tg
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nop
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srl tg, 1, t0
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xor tg, t0, tg # 0x8000800080008000
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zap t1, 0xaa, tf # 0x00ff00ff00ff00ff
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.align 4
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1: ldl t1, 0(a1) # pix0 (try to hit cache line soon)
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ldl t4, 4(a1) # pix1
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addq a1, a2, te # pixels += line_size
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ldq t0, 0(a0) # shorts0
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ldl t7, 0(te) # pix2 (try to hit cache line soon)
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ldl ta, 4(te) # pix3
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ldq t3, 8(a0) # shorts1
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ldq t6, 16(a0) # shorts2
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ldq t9, 24(a0) # shorts3
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unpkbw t1, t1 # 0 0 (quarter/op no.)
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and t0, tg, t2 # 0 1
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unpkbw t4, t4 # 1 0
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bic t0, tg, t0 # 0 2
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unpkbw t7, t7 # 2 0
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and t3, tg, t5 # 1 1
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addq t0, t1, t0 # 0 3
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xor t0, t2, t0 # 0 4
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unpkbw ta, ta # 3 0
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and t6, tg, t8 # 2 1
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maxsw4 t0, zero, t0 # 0 5
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bic t3, tg, t3 # 1 2
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bic t6, tg, t6 # 2 2
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minsw4 t0, tf, t0 # 0 6
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addq t3, t4, t3 # 1 3
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pkwb t0, t0 # 0 7
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xor t3, t5, t3 # 1 4
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maxsw4 t3, zero, t3 # 1 5
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addq t6, t7, t6 # 2 3
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xor t6, t8, t6 # 2 4
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and t9, tg, tb # 3 1
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minsw4 t3, tf, t3 # 1 6
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bic t9, tg, t9 # 3 2
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maxsw4 t6, zero, t6 # 2 5
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addq t9, ta, t9 # 3 3
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stl t0, 0(a1) # 0 8
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minsw4 t6, tf, t6 # 2 6
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xor t9, tb, t9 # 3 4
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maxsw4 t9, zero, t9 # 3 5
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lda a0, 32(a0) # block += 16;
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pkwb t3, t3 # 1 7
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minsw4 t9, tf, t9 # 3 6
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subq th, 2, th
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pkwb t6, t6 # 2 7
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pkwb t9, t9 # 3 7
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stl t3, 4(a1) # 1 8
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addq te, a2, a1 # pixels += line_size
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stl t6, 0(te) # 2 8
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stl t9, 4(te) # 3 8
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bne th, 1b
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ret
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.end add_pixels_clamped_mvi_asm
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45
libavcodec/alpha/regdef.h
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45
libavcodec/alpha/regdef.h
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@ -0,0 +1,45 @@
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/* Some BSDs don't seem to have regdef.h... sigh */
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#ifndef alpha_regdef_h
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#define alpha_regdef_h
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#define v0 $0 /* function return value */
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#define t0 $1 /* temporary registers (caller-saved) */
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#define t1 $2
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#define t2 $3
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#define t3 $4
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#define t4 $5
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#define t5 $6
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#define t6 $7
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#define t7 $8
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#define s0 $9 /* saved-registers (callee-saved registers) */
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#define s1 $10
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#define s2 $11
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#define s3 $12
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#define s4 $13
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#define s5 $14
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#define s6 $15
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#define fp s6 /* frame-pointer (s6 in frame-less procedures) */
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#define a0 $16 /* argument registers (caller-saved) */
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#define a1 $17
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#define a2 $18
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#define a3 $19
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#define a4 $20
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#define a5 $21
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#define t8 $22 /* more temps (caller-saved) */
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#define t9 $23
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#define t10 $24
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#define t11 $25
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#define ra $26 /* return address register */
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#define t12 $27
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#define pv t12 /* procedure-variable register */
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#define AT $at /* assembler temporary */
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#define gp $29 /* global pointer */
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#define sp $30 /* stack pointer */
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#define zero $31 /* reads as zero, writes are noops */
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#endif /* alpha_regdef_h */
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