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lavu/riscv: drop probing for zba CPU capability

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This commit is contained in:
Rémi Denis-Courmont 2024-07-27 15:31:55 +03:00
parent 210877c5fd
commit d1326b6347
4 changed files with 1 additions and 12 deletions
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1
libavutil/cpu.c
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@ -189,7 +189,6 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
{ "zve32f", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F32 }, .unit = "flags" },
{ "zve64x", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_I64 }, .unit = "flags" },
{ "zve64d", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVV_F64 }, .unit = "flags" },
{ "zba", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_ADDR }, .unit = "flags" },
{ "zbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RVB_BASIC }, .unit = "flags" },
{ "zvbb", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_ZVBB }, .unit = "flags" },
{ "misaligned", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_RV_MISALIGNED }, .unit = "flags" },

10
libavutil/riscv/cpu.c
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@ -63,10 +63,6 @@ int ff_get_cpu_flags_riscv(void)
ret |= AV_CPU_FLAG_RVV_I32 | AV_CPU_FLAG_RVV_I64
| AV_CPU_FLAG_RVV_F32 | AV_CPU_FLAG_RVV_F64;
#endif
#ifdef RISCV_HWPROBE_EXT_ZBA
if (pairs[1].value & RISCV_HWPROBE_EXT_ZBA)
ret |= AV_CPU_FLAG_RVB_ADDR;
#endif
#ifdef RISCV_HWPROBE_EXT_ZBB
if (pairs[1].value & RISCV_HWPROBE_EXT_ZBB)
ret |= AV_CPU_FLAG_RVB_BASIC;
@ -95,8 +91,7 @@ int ff_get_cpu_flags_riscv(void)
if (hwcap & HWCAP_RV('I'))
ret |= AV_CPU_FLAG_RVI;
if (hwcap & HWCAP_RV('B'))
ret |= AV_CPU_FLAG_RVB_ADDR | AV_CPU_FLAG_RVB_BASIC |
AV_CPU_FLAG_RVB;
ret |= AV_CPU_FLAG_RVB_BASIC | AV_CPU_FLAG_RVB;
/* The V extension implies all Zve* functional subsets */
if (hwcap & HWCAP_RV('V'))
@ -109,9 +104,6 @@ int ff_get_cpu_flags_riscv(void)
ret |= AV_CPU_FLAG_RVI;
#endif
#ifdef __riscv_zba
ret |= AV_CPU_FLAG_RVB_ADDR;
#endif
#ifdef __riscv_zbb
ret |= AV_CPU_FLAG_RVB_BASIC;
#endif

1
libavutil/tests/cpu.c
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@ -86,7 +86,6 @@ static const struct {
{ AV_CPU_FLAG_LASX, "lasx" },
#elif ARCH_RISCV
{ AV_CPU_FLAG_RVI, "rvi" },
{ AV_CPU_FLAG_RVB_ADDR, "zba" },
{ AV_CPU_FLAG_RVB_BASIC, "zbb" },
{ AV_CPU_FLAG_RVB, "rvb" },
{ AV_CPU_FLAG_RVV_I32, "zve32x" },

1
tests/checkasm/checkasm.c
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@ -291,7 +291,6 @@ static const struct {
#elif ARCH_RISCV
{ "RVI", "rvi", AV_CPU_FLAG_RVI },
{ "misaligned", "misaligned", AV_CPU_FLAG_RV_MISALIGNED },
{ "RVBaddr", "rvb_a", AV_CPU_FLAG_RVB_ADDR },
{ "RVBbasic", "rvb_b", AV_CPU_FLAG_RVB_BASIC },
{ "RVB", "rvb", AV_CPU_FLAG_RVB },
{ "RVVi32", "rvv_i32", AV_CPU_FLAG_RVV_I32 },