Commit Graph

14 Commits

Author SHA1 Message Date
Michael Niedermayer
c526a01c91 Merge commit '4f50646697606df39317b93c2a427603b77636ee'
* commit '4f50646697606df39317b93c2a427603b77636ee':
  x86: sbrdsp: Implement SSE qmf_post_shuffle

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2013-01-07 01:51:10 +01:00
Michael Niedermayer
8429320313 Merge commit '44a0036d10579ed91e48df24859e54b08a582742'
* commit '44a0036d10579ed91e48df24859e54b08a582742':
  x86: sbrdsp: Implement SSE sum64x5

Merged-by: Michael Niedermayer <michaelni@gmx.at>
2013-01-07 01:40:05 +01:00
Christophe Gisquet
4f50646697 x86: sbrdsp: Implement SSE qmf_post_shuffle
255 to 174 cycles on Arrandale / Win64. Unrolling yields no gain.

Signed-off-by: Diego Biurrun <diego@biurrun.de>
2013-01-06 13:57:01 +01:00
Christophe Gisquet
44a0036d10 x86: sbrdsp: Implement SSE sum64x5
698 to 174 cycles on Arrandale. Unrolling is a 6 cycles gain.

Signed-off-by: Diego Biurrun <diego@biurrun.de>
2013-01-06 13:57:01 +01:00
Michael Niedermayer
0110108a7c sbr_hf_gen_sse: Optimize code a bit more.
Core I7 (Sandy Bridge) 135 to 107 cycles
Core i5 (Arrandale) 162 to 142 (Thanks to Christophe Gisquet for testing)

Reviewed-by: Christophe Gisquet <christophe.gisquet@gmail.com>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
2012-12-08 17:30:11 +01:00
Christophe Gisquet
2aef3d66c9 SBR DSP x86: implement SSE sbr_hf_gen
Start and end index are multiple of 2, therefore guaranteeing aligned access.
Also, this allows to generate 4 floats per loop, keeping the alignment all
along.

Timing:
- 32 bits: 326c -> 172c
- 64 bits: 323c -> 156c

Signed-off-by: Diego Biurrun <diego@biurrun.de>
2012-12-07 11:04:26 +01:00
Diego Biurrun
04581c8c77 x86: yasm: Use complete source path for macro helper %includes
This is more consistent with the way we handle C #includes and
it simplifies the build system.
2012-10-31 00:37:42 +01:00
Diego Biurrun
6860b4081d x86: include x86inc.asm in x86util.asm
This is necessary to allow refactoring some x86util macros with cpuflags.
2012-10-31 00:37:42 +01:00
Christophe GISQUET
6b81da2fd0 dsputil x86: use SSE float instruction instead of SSE2 integer equivalent
All the more required since the users are pure SSE functions.

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-04-04 11:24:27 -07:00
Ronald S. Bultje
71ea26811c aacsbr: handle m_max values smaller than 4.
Prevents a signflip in the counter, and a subsequent crash because of
overreads/overwrites.

Found-by: Mateusz "j00ru" Jurczyk and Gynvael Coldwind
CC: libav-stable@libav.org
2012-03-23 12:56:08 -07:00
Reimar Döffinger
6eda85e15b sbrdsp.asm: convert all instructions to float/SSE ones.
Since the values are floats, using the float operations
makes sense, improves performance on some CPUs and
makes the code SSE compatible instead of needing SSE2.

Based on suggestion by Jason.

Signed-off-by: Reimar Döffinger <Reimar.Doeffinger@gmx.de>
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-03-07 13:50:13 -08:00
Reimar Döffinger
b5161908e0 SBR DSP: fix SSE code to not use SSE2 instructions.
movq from SSE register _to_ memory is an SSE2 instruction.
Use the SSE movlps function instead that does the same thing.

Signed-off-by: Reimar Döffinger <Reimar.Doeffinger@gmx.de>
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-03-06 13:40:35 -08:00
Christophe GISQUET
2784d18791 SBR DSP x86: implement SSE sbr_hf_g_filt
Unrolling the main loop to process, instead of 4 elements:
- 8: minor gain of 2 cycles (not worth the extra object size)
- 2: loss of 8 cycles.

Assigning STEP to a register is a loss. Output address (Y) is almost always
unaligned.

Timings:
- C (32/64 bits): 117/109 cycles
- SSE: 57 cycles

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-02-23 15:50:09 -08:00
Christophe GISQUET
34454c761f SBR DSP x86: implement SSE sbr_sum_square_sse
The 32bits targets have been compiled with -mfpmath=sse for proper reference.
sbr_sum_square C  /32bits: 82c (unrolled)/102c
               C  /64bits: 69c (unrolled)/82c
               SSE/32bits: 42c
               SSE/64bits: 31c

Use of SSE4.1 dpps to perform the final sum is slower.
Not unrolling to perform 8 operations in a loop yields 10 more cycles.

Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
2012-02-23 15:50:06 -08:00