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https://git.ffmpeg.org/ffmpeg.git
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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
193 lines
5.7 KiB
NASM
193 lines
5.7 KiB
NASM
;*****************************************************************************
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;* x86-optimized functions for showcqt filter
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;*
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;* Copyright (C) 2016 Muhammad Faiz <mfcc64@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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%if ARCH_X86_64
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%define pointer resq
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%else
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%define pointer resd
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%endif
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struc Coeffs
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.val: pointer 1
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.start: resd 1
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.len: resd 1
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.sizeof:
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endstruc
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%macro CQT_CALC 9
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; %1 = a_re, %2 = a_im, %3 = b_re, %4 = b_im
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; %5 = m_re, %6 = m_im, %7 = tmp, %8 = coeffval, %9 = coeffsq_offset
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mov id, xd
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add id, [coeffsq + Coeffs.start + %9]
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movaps m%5, [srcq + 8 * iq]
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movaps m%7, [srcq + 8 * iq + mmsize]
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shufps m%6, m%5, m%7, q3131
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shufps m%5, m%5, m%7, q2020
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sub id, fft_lend
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FMULADD_PS m%2, m%6, m%8, m%2, m%6
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neg id
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FMULADD_PS m%1, m%5, m%8, m%1, m%5
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movups m%5, [srcq + 8 * iq - mmsize + 8]
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movups m%7, [srcq + 8 * iq - 2*mmsize + 8]
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%if mmsize == 32
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vperm2f128 m%5, m%5, m%5, 1
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vperm2f128 m%7, m%7, m%7, 1
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%endif
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shufps m%6, m%5, m%7, q1313
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shufps m%5, m%5, m%7, q0202
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FMULADD_PS m%4, m%6, m%8, m%4, m%6
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FMULADD_PS m%3, m%5, m%8, m%3, m%5
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%endmacro ; CQT_CALC
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%macro CQT_SEPARATE 6 ; a_re, a_im, b_re, b_im, tmp, tmp2
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addps m%5, m%4, m%2
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subps m%6, m%3, m%1
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addps m%1, m%1, m%3
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subps m%2, m%2, m%4
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HADDPS m%5, m%6, m%3
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HADDPS m%1, m%2, m%3
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HADDPS m%1, m%5, m%2
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%if mmsize == 32
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vextractf128 xmm%2, m%1, 1
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addps xmm%1, xmm%2
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%endif
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%endmacro ; CQT_SEPARATE
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%macro DECLARE_CQT_CALC 0
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; ff_showcqt_cqt_calc_*(dst, src, coeffs, len, fft_len)
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%if ARCH_X86_64
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cglobal showcqt_cqt_calc, 5, 10, 12, dst, src, coeffs, len, fft_len, x, coeffs_val, coeffs_val2, i, coeffs_len
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align 16
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.loop_k:
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mov xd, [coeffsq + Coeffs.len]
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xorps m0, m0, m0
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movaps m1, m0
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movaps m2, m0
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mov coeffs_lend, [coeffsq + Coeffs.len + Coeffs.sizeof]
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movaps m3, m0
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movaps m8, m0
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cmp coeffs_lend, xd
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movaps m9, m0
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movaps m10, m0
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movaps m11, m0
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cmova coeffs_lend, xd
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xor xd, xd
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test coeffs_lend, coeffs_lend
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jz .check_loop_b
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mov coeffs_valq, [coeffsq + Coeffs.val]
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mov coeffs_val2q, [coeffsq + Coeffs.val + Coeffs.sizeof]
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align 16
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.loop_ab:
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movaps m7, [coeffs_valq + 4 * xq]
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CQT_CALC 0, 1, 2, 3, 4, 5, 6, 7, 0
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movaps m7, [coeffs_val2q + 4 * xq]
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CQT_CALC 8, 9, 10, 11, 4, 5, 6, 7, Coeffs.sizeof
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add xd, mmsize/4
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cmp xd, coeffs_lend
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jb .loop_ab
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.check_loop_b:
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cmp xd, [coeffsq + Coeffs.len + Coeffs.sizeof]
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jae .check_loop_a
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align 16
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.loop_b:
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movaps m7, [coeffs_val2q + 4 * xq]
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CQT_CALC 8, 9, 10, 11, 4, 5, 6, 7, Coeffs.sizeof
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add xd, mmsize/4
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cmp xd, [coeffsq + Coeffs.len + Coeffs.sizeof]
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jb .loop_b
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.loop_end:
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CQT_SEPARATE 0, 1, 2, 3, 4, 5
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CQT_SEPARATE 8, 9, 10, 11, 4, 5
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mulps xmm0, xmm0
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mulps xmm8, xmm8
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HADDPS xmm0, xmm8, xmm1
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movaps [dstq], xmm0
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sub lend, 2
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lea dstq, [dstq + 16]
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lea coeffsq, [coeffsq + 2*Coeffs.sizeof]
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jnz .loop_k
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RET
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align 16
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.check_loop_a:
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cmp xd, [coeffsq + Coeffs.len]
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jae .loop_end
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align 16
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.loop_a:
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movaps m7, [coeffs_valq + 4 * xq]
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CQT_CALC 0, 1, 2, 3, 4, 5, 6, 7, 0
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add xd, mmsize/4
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cmp xd, [coeffsq + Coeffs.len]
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jb .loop_a
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jmp .loop_end
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%else
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cglobal showcqt_cqt_calc, 4, 7, 8, dst, src, coeffs, len, x, coeffs_val, i
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%define fft_lend r4m
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align 16
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.loop_k:
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mov xd, [coeffsq + Coeffs.len]
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xorps m0, m0, m0
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movaps m1, m0
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movaps m2, m0
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movaps m3, m0
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test xd, xd
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jz .store
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mov coeffs_valq, [coeffsq + Coeffs.val]
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xor xd, xd
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align 16
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.loop_x:
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movaps m7, [coeffs_valq + 4 * xq]
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CQT_CALC 0, 1, 2, 3, 4, 5, 6, 7, 0
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add xd, mmsize/4
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cmp xd, [coeffsq + Coeffs.len]
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jb .loop_x
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CQT_SEPARATE 0, 1, 2, 3, 4, 5
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mulps xmm0, xmm0
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HADDPS xmm0, xmm0, xmm1
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.store:
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movlps [dstq], xmm0
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sub lend, 1
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lea dstq, [dstq + 8]
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lea coeffsq, [coeffsq + Coeffs.sizeof]
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jnz .loop_k
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RET
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%endif ; ARCH_X86_64
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%endmacro ; DECLARE_CQT_CALC
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INIT_XMM sse
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DECLARE_CQT_CALC
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INIT_XMM sse3
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DECLARE_CQT_CALC
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%if HAVE_AVX_EXTERNAL
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INIT_YMM avx
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DECLARE_CQT_CALC
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%endif
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%if HAVE_FMA3_EXTERNAL
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INIT_YMM fma3
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DECLARE_CQT_CALC
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%endif
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%if HAVE_FMA4_EXTERNAL
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INIT_XMM fma4
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DECLARE_CQT_CALC
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%endif
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