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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
100 lines
2.9 KiB
NASM
100 lines
2.9 KiB
NASM
;******************************************************************************
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;* SIMD-optimized halfpel functions for VP3
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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; void ff_put_no_rnd_pixels8_x2_exact(uint8_t *block, const uint8_t *pixels, ptrdiff_t line_size, int h)
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INIT_MMX mmxext
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cglobal put_no_rnd_pixels8_x2_exact, 4,5
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lea r4, [r2*3]
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pcmpeqb m6, m6
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.loop:
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mova m0, [r1]
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mova m2, [r1+r2]
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mova m1, [r1+1]
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mova m3, [r1+r2+1]
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pxor m0, m6
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pxor m2, m6
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pxor m1, m6
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pxor m3, m6
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PAVGB m0, m1
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PAVGB m2, m3
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pxor m0, m6
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pxor m2, m6
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mova [r0], m0
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mova [r0+r2], m2
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mova m0, [r1+r2*2]
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mova m1, [r1+r2*2+1]
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mova m2, [r1+r4]
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mova m3, [r1+r4+1]
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pxor m0, m6
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pxor m1, m6
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pxor m2, m6
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pxor m3, m6
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PAVGB m0, m1
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PAVGB m2, m3
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pxor m0, m6
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pxor m2, m6
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mova [r0+r2*2], m0
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mova [r0+r4], m2
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lea r1, [r1+r2*4]
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lea r0, [r0+r2*4]
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sub r3d, 4
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jg .loop
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RET
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; void ff_put_no_rnd_pixels8_y2_exact(uint8_t *block, const uint8_t *pixels, ptrdiff_t line_size, int h)
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INIT_MMX mmxext
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cglobal put_no_rnd_pixels8_y2_exact, 4,5
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lea r4, [r2*3]
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mova m0, [r1]
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pcmpeqb m6, m6
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add r1, r2
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pxor m0, m6
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.loop:
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mova m1, [r1]
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mova m2, [r1+r2]
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pxor m1, m6
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pxor m2, m6
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PAVGB m0, m1
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PAVGB m1, m2
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pxor m0, m6
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pxor m1, m6
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mova [r0], m0
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mova [r0+r2], m1
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mova m1, [r1+r2*2]
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mova m0, [r1+r4]
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pxor m1, m6
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pxor m0, m6
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PAVGB m2, m1
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PAVGB m1, m0
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pxor m2, m6
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pxor m1, m6
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mova [r0+r2*2], m2
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mova [r0+r4], m1
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lea r1, [r1+r2*4]
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lea r0, [r0+r2*4]
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sub r3d, 4
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jg .loop
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RET
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