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55d8618a47
x64 always has MMX, MMXEXT, SSE and SSE2 and this means that some functions for MMX, MMXEXT and 3dnow are always overridden by other functions (unless one e.g. explicitly disables SSE2) for x64. So given that the only systems that benefit from these functions are truely ancient 32bit x86s they are removed. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
110 lines
2.9 KiB
NASM
110 lines
2.9 KiB
NASM
;*****************************************************************************
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;* SIMD-optimized MPEG encoding functions
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;*****************************************************************************
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;* Copyright (c) 2000, 2001 Fabrice Bellard
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;* Copyright (c) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;*****************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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; int ff_pix_sum16(uint8_t *pix, int line_size)
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; %1 = number of loops
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; %2 = number of GPRs used
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%macro PIX_SUM16 3
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cglobal pix_sum16, 2, %2, 6
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movsxdifnidn r1, r1d
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mov r2, %1
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lea r3, [r1*3]
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%if notcpuflag(xop)
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pxor m5, m5
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%endif
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pxor m4, m4
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.loop:
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%if cpuflag(xop)
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vphaddubq m0, [r0]
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vphaddubq m1, [r0+r1]
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vphaddubq m2, [r0+r1*2]
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vphaddubq m3, [r0+r3]
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%else
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mova m0, [r0]
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mova m1, [r0+r1]
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mova m2, [r0+r1*2]
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mova m3, [r0+r3]
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psadbw m0, m5
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psadbw m1, m5
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psadbw m2, m5
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psadbw m3, m5
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%endif ; cpuflag(xop)
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paddw m1, m0
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paddw m3, m2
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paddw m3, m1
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paddw m4, m3
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lea r0, [r0+r1*%3]
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dec r2
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jne .loop
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pshufd m0, m4, q0032
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paddd m4, m0
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movd eax, m4
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RET
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%endmacro
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INIT_XMM sse2
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PIX_SUM16 4, 4, 4
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%if HAVE_XOP_EXTERNAL
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INIT_XMM xop
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PIX_SUM16 4, 4, 4
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%endif
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; int ff_pix_norm1(uint8_t *pix, int line_size)
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; %1 = number of xmm registers used
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; %2 = number of loops
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%macro PIX_NORM1 2
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cglobal pix_norm1, 2, 3, %1
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movsxdifnidn r1, r1d
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mov r2, %2
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pxor m0, m0
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pxor m5, m5
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.loop:
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mova m2, [r0+0]
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mova m3, [r0+r1]
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punpckhbw m1, m2, m0
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punpcklbw m2, m0
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punpckhbw m4, m3, m0
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punpcklbw m3, m0
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pmaddwd m1, m1
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pmaddwd m2, m2
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pmaddwd m3, m3
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pmaddwd m4, m4
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paddd m2, m1
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paddd m4, m3
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paddd m5, m2
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paddd m5, m4
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lea r0, [r0+r1*2]
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dec r2
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jne .loop
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HADDD m5, m1
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movd eax, m5
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RET
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%endmacro
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INIT_XMM sse2
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PIX_NORM1 6, 8
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