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bbe95f7353
From x86inc: > On AMD cpus <=K10, an ordinary ret is slow if it immediately follows either > a branch or a branch target. So switch to a 2-byte form of ret in that case. > We can automatically detect "follows a branch", but not a branch target. > (SSSE3 is a sufficient condition to know that your cpu doesn't have this problem.) x86inc can automatically determine whether to use REP_RET rather than REP in most of these cases, so impact is minimal. Additionally, a few REP_RETs were used unnecessary, despite the return being nowhere near a branch. The only CPUs affected were AMD K10s, made between 2007 and 2011, 16 years ago and 12 years ago, respectively. In the future, everyone involved with x86inc should consider dropping REP_RETs altogether.
157 lines
4.0 KiB
NASM
157 lines
4.0 KiB
NASM
;******************************************************************************
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;* x86-optimized horizontal line scaling functions
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;* Copyright 2020 Google LLC
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;* Copyright (c) 2011 Ronald S. Bultje <rsbultje@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA 32
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swizzle: dd 0, 4, 1, 5, 2, 6, 3, 7
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four: times 8 dd 4
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SECTION .text
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;-----------------------------------------------------------------------------
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; horizontal line scaling
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;
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; void hscale8to15_<filterSize>_<opt>
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; (SwsContext *c, int16_t *dst,
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; int dstW, const uint8_t *src,
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; const int16_t *filter,
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; const int32_t *filterPos, int filterSize);
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;
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; Scale one horizontal line. Input is 8-bit width Filter is 14 bits. Output is
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; 15 bits (in int16_t). Each output pixel is generated from $filterSize input
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; pixels, the position of the first pixel is given in filterPos[nOutputPixel].
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;-----------------------------------------------------------------------------
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%macro SCALE_FUNC 1
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cglobal hscale8to15_%1, 7, 9, 16, pos0, dst, w, srcmem, filter, fltpos, fltsize, count, inner
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pxor m0, m0
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mova m15, [swizzle]
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xor countq, countq
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movsxd wq, wd
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%ifidn %1, X4
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mova m14, [four]
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shr fltsized, 2
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%endif
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cmp wq, 0x10
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jl .tail_loop
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sub wq, 0x10
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.loop:
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movu m1, [fltposq]
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movu m2, [fltposq+32]
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%ifidn %1, X4
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pxor m9, m9
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pxor m10, m10
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pxor m11, m11
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pxor m12, m12
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xor innerq, innerq
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.innerloop:
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%endif
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vpcmpeqd m13, m13
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vpgatherdd m3,[srcmemq + m1], m13
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vpcmpeqd m13, m13
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vpgatherdd m4,[srcmemq + m2], m13
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vpunpcklbw m5, m3, m0
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vpunpckhbw m6, m3, m0
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vpunpcklbw m7, m4, m0
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vpunpckhbw m8, m4, m0
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vpmaddwd m5, m5, [filterq]
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vpmaddwd m6, m6, [filterq + 32]
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vpmaddwd m7, m7, [filterq + 64]
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vpmaddwd m8, m8, [filterq + 96]
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add filterq, 0x80
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%ifidn %1, X4
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paddd m9, m5
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paddd m10, m6
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paddd m11, m7
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paddd m12, m8
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paddd m1, m14
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paddd m2, m14
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add innerq, 1
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cmp innerq, fltsizeq
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jl .innerloop
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vphaddd m5, m9, m10
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vphaddd m6, m11, m12
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%else
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vphaddd m5, m5, m6
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vphaddd m6, m7, m8
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%endif
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vpsrad m5, 7
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vpsrad m6, 7
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vpackssdw m5, m5, m6
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vpermd m5, m15, m5
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vmovdqu [dstq + countq * 2], m5
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add fltposq, 0x40
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add countq, 0x10
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cmp countq, wq
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jle .loop
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add wq, 0x10
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cmp countq, wq
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jge .end
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.tail_loop:
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movu xm1, [fltposq]
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%ifidn %1, X4
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pxor xm9, xm9
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pxor xm10, xm10
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xor innerq, innerq
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.tail_innerloop:
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%endif
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vpcmpeqd xm13, xm13
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vpgatherdd xm3,[srcmemq + xm1], xm13
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vpunpcklbw xm5, xm3, xm0
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vpunpckhbw xm6, xm3, xm0
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vpmaddwd xm5, xm5, [filterq]
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vpmaddwd xm6, xm6, [filterq + 0x10]
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add filterq, 0x20
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%ifidn %1, X4
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paddd xm9, xm5
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paddd xm10, xm6
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paddd xm1, xm14
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add innerq, 1
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cmp innerq, fltsizeq
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jl .tail_innerloop
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vphaddd xm5, xm9, xm10
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%else
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vphaddd xm5, xm5, xm6
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%endif
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vpsrad xm5, 7
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vpackssdw xm5, xm5, xm5
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vmovq [dstq + countq * 2], xm5
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add fltposq, 0x10
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add countq, 0x4
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cmp countq, wq
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jl .tail_loop
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.end:
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RET
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%endmacro
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%if ARCH_X86_64
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%if HAVE_AVX2_EXTERNAL
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INIT_YMM avx2
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SCALE_FUNC 4
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SCALE_FUNC X4
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%endif
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%endif
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