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Add a test for scatter add. (#238)
* Add a test for scatter add (segfaults on gpus for now). * Bugfix for the scatter add cuda kernel.
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@ -846,7 +846,7 @@ impl<'a> Map2InPlace for ScatterAdd<'a> {
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fn f<T: DeviceRepr + WithDType + ValidAsZeroBits>(
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&self,
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dst: &mut CudaSlice<T>,
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_dst_shape: &Shape,
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dst_shape: &Shape,
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src: &CudaSlice<T>,
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src_l: &Layout,
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dev: &CudaDevice,
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@ -874,11 +874,11 @@ impl<'a> Map2InPlace for ScatterAdd<'a> {
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let left_sz: usize = src_l.dims()[..dim].iter().product();
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let right_sz: usize = src_l.dims()[dim + 1..].iter().product();
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let src_dim_sz = src_l.dims()[dim];
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let ids_dim_sz = ids_l.dims()[dim];
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let dst_dim_sz = dst_shape.dims()[dim];
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let cfg = LaunchConfig::for_num_elems((left_sz * right_sz) as u32);
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let func = dev.get_or_load_func(&kernel_name::<T>(name), kernels::INDEXING)?;
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// SAFETY: Set later by running the kernel.
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let params = (ids, &src, dst, left_sz, src_dim_sz, ids_dim_sz, right_sz);
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let params = (ids, &src, dst, left_sz, src_dim_sz, dst_dim_sz, right_sz);
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// SAFETY: ffi.
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unsafe { func.launch(cfg, params) }.w()?;
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Ok(())
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@ -389,6 +389,46 @@ fn index_add(device: &Device) -> Result<()> {
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Ok(())
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}
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fn scatter_add(device: &Device) -> Result<()> {
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let t = Tensor::arange(0f32, 12f32, device)?.reshape((4, 3))?;
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assert_eq!(
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t.to_vec2::<f32>()?,
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&[
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[0.0, 1.0, 2.0],
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[3.0, 4.0, 5.0],
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[6.0, 7.0, 8.0],
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[9.0, 10.0, 11.0]
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]
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);
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let ids = Tensor::new(&[[0u32, 1, 2], [3, 4, 0], [3, 3, 1], [2, 0, 4]], device)?;
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let init = Tensor::ones((4, 5), DType::F32, device)?;
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let hs = init.scatter_add(&ids, &t, 1)?;
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assert_eq!(
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hs.to_vec2::<f32>()?,
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&[
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[1.0, 2.0, 3.0, 1.0, 1.0],
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[6.0, 1.0, 1.0, 4.0, 5.0],
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[1.0, 9.0, 1.0, 14.0, 1.0],
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[11.0, 1.0, 10.0, 1.0, 12.0]
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]
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);
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let init = Tensor::ones((6, 3), DType::F32, device)?;
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let hs = init.scatter_add(&ids, &t, 0)?;
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assert_eq!(
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hs.to_vec2::<f32>()?,
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&[
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[1.0, 11.0, 6.0],
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[1.0, 2.0, 9.0],
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[10.0, 1.0, 3.0],
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[10.0, 8.0, 1.0],
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[1.0, 5.0, 12.0],
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[1.0, 1.0, 1.0]
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]
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);
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Ok(())
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}
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fn gather(device: &Device) -> Result<()> {
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let ids = Tensor::new(&[[0u32], [2u32], [1u32], [0u32]], device)?;
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let t = Tensor::arange(0f32, 12f32, device)?.reshape((4, 3))?;
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@ -588,3 +628,4 @@ test_device!(broadcasting, broadcasting_cpu, broadcasting_gpu);
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test_device!(index_select, index_select_cpu, index_select_gpu);
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test_device!(index_add, index_add_cpu, index_add_gpu);
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test_device!(gather, gather_cpu, gather_gpu);
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test_device!(scatter_add, scatter_add_cpu, scatter_add_gpu);
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@ -144,7 +144,6 @@ extern "C" __global__ void FN_NAME( \
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template<typename T, typename I>
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__device__ void scatter_add(
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const I *ids,
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const size_t ids_dim_size,
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const T *inp,
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T *out,
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const size_t left_size,
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@ -156,8 +155,8 @@ __device__ void scatter_add(
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for (unsigned int i = blockIdx.x * blockDim.x + threadIdx.x; i < numel; i += blockDim.x * gridDim.x) {
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const size_t pre = i / right_size;
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const size_t post = i % right_size;
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for (unsigned int j = 0; j < ids_dim_size; ++j) {
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const size_t src_i = (pre * ids_dim_size + j) * right_size + post;
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for (unsigned int j = 0; j < src_dim_size; ++j) {
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const size_t src_i = (pre * src_dim_size + j) * right_size + post;
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const size_t idx = ids[src_i];
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const size_t dst_i = (pre * dst_dim_size + idx) * right_size + post;
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out[dst_i] += inp[src_i];
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@ -168,14 +167,13 @@ __device__ void scatter_add(
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#define SA_OP(TYPENAME, INDEX_TYPENAME, FN_NAME) \
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extern "C" __global__ void FN_NAME( \
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const INDEX_TYPENAME *ids, \
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const size_t ids_dim_size, \
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const TYPENAME *inp, \
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TYPENAME *out, \
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const size_t left_size, \
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const size_t src_dim_size, \
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const size_t dst_dim_size, \
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const size_t right_size \
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) { scatter_add(ids, ids_dim_size, inp, out, left_size, src_dim_size, dst_dim_size, right_size); } \
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) { scatter_add(ids, inp, out, left_size, src_dim_size, dst_dim_size, right_size); } \
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#if __CUDA_ARCH__ >= 800
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