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Check the bounds in the cuda indexing kernels. (#2908)
* Check the bounds in the cuda indexing kernels. * Another check.
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@ -395,7 +395,7 @@ impl Map1 for IndexSelect<'_> {
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CudaStorageSlice::U8(slice) => ("is_u8", slice_ptr(slice, ids_l.start_offset())),
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CudaStorageSlice::I64(slice) => ("is_i64", slice_ptr(slice, ids_l.start_offset())),
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_ => Err(CudaError::UnexpectedDType {
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msg: "index_select ids should be u8 or u32",
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msg: "index_select ids should be u8, u32, or i64",
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expected: DType::U32,
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got: self.0.dtype(),
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})
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@ -241,7 +241,7 @@ impl Tensor {
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/// `self` and `src` must have the same shape except on dimension `dim` where the `self` size
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/// has to be greater than or equal to `offset` plus the `src` size.
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///
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/// Note that this modifies `self` in place and as such is not compatibel with
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/// Note that this modifies `self` in place and as such is not compatible with
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/// back-propagation.
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pub fn slice_set<D: Dim>(&self, src: &Self, dim: D, offset: usize) -> Result<()> {
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let dim = dim.to_index(self.shape(), "slice-set")?;
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@ -826,6 +826,31 @@ fn embeddings(device: &Device) -> Result<()> {
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Ok(())
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}
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#[test]
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fn index_select_fail() -> Result<()> {
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// Check that an error is properly reported on out of bounds.
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let ids = Tensor::new(&[4u32, 2u32, 1u32], &Device::Cpu)?;
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let t = Tensor::new(&[[0f32, 1f32], [2f32, 3f32], [4f32, 5f32]], &Device::Cpu)?;
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let hs = t.index_select(&ids, 0);
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assert!(hs.is_err());
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Ok(())
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}
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// The test below triggers an unwinding panic as there is a panic within the
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// #[cfg(feature = "cuda")]
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// #[test]
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// #[should_panic]
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// fn index_select_fail_gpu() {
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// // Check that a panic happens for out of bounds in cuda
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// if let Ok(device) = Device::new_cuda(0) {
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// if let Ok(ids) = Tensor::new(&[4u32, 2u32, 1u32], &device) {
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// if let Ok(t) = Tensor::new(&[[0f32, 1f32], [2f32, 3f32], [4f32, 5f32]], &device) {
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// let _ = t.index_select(&ids, 0);
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// }
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// }
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// }
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// }
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fn cmp(device: &Device) -> Result<()> {
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let t1 = Tensor::new(&[[0f32, 1f32], [2f32, 3f32], [4f32, 5f32]], device)?;
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let t2 = Tensor::new(&[[1f32, 0f32], [3f32, 3f32], [4f32, 7f32]], device)?;
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@ -23,6 +23,7 @@ __device__ void index_select(
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unsigned int left_i = dst_i / (ids_dim_size * right_size);
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unsigned int id_i = dst_i / right_size % ids_dim_size;
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unsigned int right_i = dst_i % right_size;
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assert(ids[id_i] < src_dim_size);
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unsigned int src_i = left_i * (src_dim_size * right_size) + ids[id_i] * right_size + right_i;
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unsigned strided_i = b ? src_i : get_strided_index(src_i, num_dims, dims, strides);
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out[dst_i] = inp[strided_i];
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@ -57,6 +58,7 @@ __device__ void gather(
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for (unsigned int i = blockIdx.x * blockDim.x + threadIdx.x; i < numel; i += blockDim.x * gridDim.x) {
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size_t post = i % right_size;
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size_t idx = ids[i];
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assert(idx < src_dim_size);
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size_t pre = i / (right_size * ids_dim_size);
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size_t src_i = (pre * src_dim_size + idx) * right_size + post;
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out[i] = inp[src_i];
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@ -92,6 +94,7 @@ __device__ void index_add(
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const size_t post = i % right_size;
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for (unsigned int j = 0; j < ids_dim_size; ++j) {
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const size_t idx = ids[j];
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assert(idx < dst_dim_size);
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const size_t src_i = (pre * ids_dim_size + j) * right_size + post;
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const size_t dst_i = (pre * dst_dim_size + idx) * right_size + post;
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out[dst_i] += inp[src_i];
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@ -128,6 +131,7 @@ __device__ void scatter_add(
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for (unsigned int j = 0; j < src_dim_size; ++j) {
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const size_t src_i = (pre * src_dim_size + j) * right_size + post;
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const size_t idx = ids[src_i];
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assert(idx < dst_dim_size);
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const size_t dst_i = (pre * dst_dim_size + idx) * right_size + post;
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out[dst_i] += inp[src_i];
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}
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