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8d1a57c9a0
* chore: update flash attention kernels * fmt * remove unused kernels * force f32 * correct stride
255 lines
16 KiB
C++
255 lines
16 KiB
C++
/******************************************************************************
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* Copyright (c) 2023, Tri Dao.
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******************************************************************************/
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#pragma once
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#include "static_switch.h"
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#include "flash.h"
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#include "flash_fwd_kernel.h"
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template<typename Kernel_traits, bool Is_dropout, bool Is_causal, bool Is_local, bool Has_alibi, bool Is_even_MN, bool Is_even_K, bool Return_softmax>
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__global__ void flash_fwd_kernel(Flash_fwd_params params) {
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static_assert(!(Is_causal && Is_local)); // If Is_local is true, Is_causal should be false
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flash::compute_attn<Kernel_traits, Is_dropout, Is_causal, Is_local, Has_alibi, Is_even_MN, Is_even_K, Return_softmax>(params);
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}
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template<typename Kernel_traits, bool Is_dropout, bool Is_causal>
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void run_flash_fwd(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr size_t smem_size = Kernel_traits::kSmemSize;
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// printf("smem_size = %d\n", smem_size);
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// Work-around for gcc 7. It doesn't like nested BOOL_SWITCH.
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// https://github.com/kokkos/kokkos-kernels/issues/349
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// https://github.com/HazyResearch/flash-attention/issues/21
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const int num_m_block = (params.seqlen_q + Kernel_traits::kBlockM - 1) / Kernel_traits::kBlockM;
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dim3 grid(num_m_block, params.b, params.h);
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const bool is_even_MN = params.cu_seqlens_q == nullptr && params.cu_seqlens_k == nullptr && params.seqlen_k % Kernel_traits::kBlockN == 0 && params.seqlen_q % Kernel_traits::kBlockM == 0;
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const bool is_even_K = params.d == Kernel_traits::kHeadDim;
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const bool return_softmax = params.p_ptr != nullptr;
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BOOL_SWITCH(is_even_MN, IsEvenMNConst, [&] {
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BOOL_SWITCH(is_even_K, IsEvenKConst, [&] {
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BOOL_SWITCH((params.window_size_left >= 0 || params.window_size_right >= 0) && !Is_causal, Is_local, [&] {
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BOOL_SWITCH(return_softmax, ReturnSoftmaxConst, [&] {
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BOOL_SWITCH(params.alibi_slopes_ptr != nullptr, Has_alibi, [&] {
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// Will only return softmax if dropout, to reduce compilation time.
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// If not IsEvenKConst, we also set IsEvenMNConst to false to reduce number of templates.
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// If return_softmax, set IsEvenMNConst to false to reduce number of templates
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// If head dim > 128, set IsEvenMNConst to false to reduce number of templates
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// If Is_local, set Is_causal to false
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auto kernel = &flash_fwd_kernel<Kernel_traits, Is_dropout, Is_causal, Is_local && !Is_causal, Has_alibi, IsEvenMNConst && IsEvenKConst && !Is_local && !ReturnSoftmaxConst && Kernel_traits::kHeadDim <= 128, IsEvenKConst, ReturnSoftmaxConst && Is_dropout>;
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// auto kernel = &flash_fwd_kernel<Kernel_traits, false, Is_causal, false, false, true, true, false>;
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// printf("IsEvenMNConst = %d, IsEvenKConst = %d, Is_local = %d, Is_causal = %d, ReturnSoftmaxConst = %d, Is_dropout = %d\n", int(IsEvenMNConst), int(IsEvenKConst), int(Is_local), int(Is_causal), int(ReturnSoftmaxConst), int(Is_dropout));
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// auto kernel = &flash_fwd_kernel<Kernel_traits, false, Is_causal, false, true, true, false>;
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// int ctas_per_sm;
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// cudaError status_ = cudaOccupancyMaxActiveBlocksPerMultiprocessor(
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// &ctas_per_sm, kernel, Kernel_traits::kNThreads, smem_size);
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// printf("smem_size = %d, CTAs per SM = %d\n", int(smem_size), ctas_per_sm);
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kernel<<<grid, Kernel_traits::kNThreads, smem_size, stream>>>(params);
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});
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});
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});
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim32(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 32;
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 128, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim64(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 64;
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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if constexpr(!Is_dropout) {
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// Using 8 warps is 18% slower for seqlen=2k, 2 warps is 5% slower
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// Using block size (64 x 256) is 27% slower for seqlen=2k
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// Using block size (256 x 64) is 85% slower for seqlen=2k, because of register spilling
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 128, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, true, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, true, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 128, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim96(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 96;
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// auto dprops = at::cuda::getCurrentDeviceProperties();
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bool is_sm8x = true; // dprops->major == 8 && dprops->minor > 0;
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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// For sm86 or sm89, 64 x 64 is the fastest for causal (because it's square),
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if (is_sm8x) {
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if constexpr(!Is_causal) {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, true, T>, Is_dropout, Is_causal>(params, stream);
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// These two are always slower
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// run_flash_fwd<Flash_fwd_kernel_traits<96, 128, 128, 4, true, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<96, 64, 128, 4, true, T>>(params, stream);
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim128(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 128;
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// auto dprops = at::cuda::getCurrentDeviceProperties();
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bool is_sm8x = true; // dprops->major == 8 && dprops->minor > 0;
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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if constexpr(!Is_dropout) {
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// For sm86 or sm89, 64 x 64 is the fastest for causal (because it's square),
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// and 128 x 32 (48 KB smem) is the fastest for non-causal since we get 2 CTAs per SM.
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if (is_sm8x) {
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if constexpr(!Is_causal) {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, true, true, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 128, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// Using 8 warps (128 x 128 and 256 x 64) is 28% slower for seqlen=2k
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 128, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// 1st ones are good for H100, A100
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// 2nd one is good for A6000 bc we get slightly better occupancy
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, true, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, true, true, T>, Is_dropout, Is_causal>(params, stream);
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}
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim160(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 160;
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// auto dprops = at::cuda::getCurrentDeviceProperties();
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bool is_sm8x = true; // dprops->major == 8 && dprops->minor > 0;
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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// For A100, H100, 128 x 32 is the fastest.
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// For sm86 or sm89, 64 x 64 is the fastest for causal (because it's square),
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// and 128 x 64 with 8 warps is the fastest for non-causal.
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if (is_sm8x) {
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if constexpr(!Is_causal) {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, false, true, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 128, 4, false, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 8, false, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 128, 8, false, T>>(params, stream);
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim192(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 192;
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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if constexpr(!Is_dropout) {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 4, false, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 128, 4, false, T>>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 128, 8, false, T>>(params, stream);
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim224(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 224;
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int device;
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cudaGetDevice(&device);
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int max_smem_per_block;
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cudaError status_ = cudaDeviceGetAttribute(
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&max_smem_per_block, cudaDevAttrMaxSharedMemoryPerBlockOptin, device);
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// printf("max_smem_per_block = %d\n", max_smem_per_block);
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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if (max_smem_per_block >= 2 * Headdim * (128 + 2 * 64)) { // 112 KB
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// We can't do 128 x 32 with 8 warps because with headdim 224, kBlockKSmem = 32.
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// If we have N = 32, there are only 1024 elements to load at once, where each load
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// is 8 elements. This means we can only use 128 threads and not 256 threads.
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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});
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});
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}
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template<typename T>
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void run_mha_fwd_hdim256(Flash_fwd_params ¶ms, cudaStream_t stream) {
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constexpr static int Headdim = 256;
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int device;
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cudaGetDevice(&device);
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int max_smem_per_sm, max_smem_per_block;
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cudaError status_ = cudaDeviceGetAttribute(
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&max_smem_per_sm, cudaDevAttrMaxSharedMemoryPerMultiprocessor, device);
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status_ = cudaDeviceGetAttribute(
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&max_smem_per_block, cudaDevAttrMaxSharedMemoryPerBlockOptin, device);
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// printf("max_smem_per_sm = %d, max_smem_per_block = %d\n", max_smem_per_sm, max_smem_per_block);
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BOOL_SWITCH(params.p_dropout < 1.f, Is_dropout, [&] {
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BOOL_SWITCH(params.is_causal, Is_causal, [&] {
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// For A100, we want to run with 128 x 64 (128KB smem).
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// For H100 we want to run with 64 x 64 (96KB smem) since then we can get 2 CTAs per SM.
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if (max_smem_per_block >= 2 * Headdim * (128 + 2 * 64) && max_smem_per_sm < 4 * Headdim * (64 + 2 * 64)) {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 64, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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} else {
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run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 64, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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}
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// 64 KB
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 64, 32, 4, false, false, T>, Is_dropout, Is_causal>(params, stream);
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// 96 KB
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// run_flash_fwd<Flash_fwd_kernel_traits<Headdim, 128, 32, 8, false, false, T>, Is_dropout, Is_causal>(params, stream);
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});
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});
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}
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