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459e2e1ae3
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Properly handle the stride in conv1d.
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2023-07-04 15:05:04 +01:00 |
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b3d4d0fd0f
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Very inefficient conv1d implementation.
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2023-07-04 13:50:41 +01:00 |
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950b4af49e
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Proper conv1d dispatch.
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2023-07-04 11:29:28 +01:00 |
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a424d95473
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Add more of the conv1d op.
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2023-07-04 11:15:45 +01:00 |
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3aac1047fe
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Sketch the conv1d op.
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2023-07-04 10:52:34 +01:00 |
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a57b314780
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Add a batch dimension on the bert example.
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2023-07-04 06:10:52 +01:00 |
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86d691c74c
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Better handling of the batch dimension in matmul.
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2023-07-03 22:51:40 +01:00 |
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ad52b0377c
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Add the varbuilder + check shapes.
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2023-07-03 15:32:20 +01:00 |
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0b3cc215f1
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Address comments.
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2023-07-03 13:52:27 +02:00 |
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5bc66c68fa
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Adding saving capabilities.
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2023-07-03 13:39:24 +02:00 |
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81cec86e75
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Adding a bit more docs around safety.
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2023-07-03 11:55:54 +02:00 |
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899c76de75
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Handle more types in safetensors.
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2023-07-03 10:09:46 +01:00 |
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783b7054ee
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Move more safetensors bits to the shared module.
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2023-07-03 09:34:08 +01:00 |
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fe2c07e368
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Add the ST error.
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2023-07-03 08:44:00 +01:00 |
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cf2789fb81
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Move some safetensors bits in the candle-core crate.
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2023-07-03 08:37:46 +01:00 |
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78871ffe38
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Add dtype support.
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2023-07-02 20:12:26 +01:00 |
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bbe0c5fbaa
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Do not use rayon for a single thread (bis).
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2023-06-30 18:47:22 +01:00 |
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6b67d25d9f
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Do not use rayon for a single thread.
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2023-06-30 18:46:32 +01:00 |
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fbc329ed85
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Add the verbose cpu cast operations.
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2023-06-30 10:33:29 +01:00 |
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8ad47907f3
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Add the kernels.
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2023-06-30 10:26:56 +01:00 |
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19cbbc5212
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Improve how we check that the dims are in bounds.
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2023-06-30 09:11:00 +01:00 |
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b50bd880ce
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Only narrow when needed + deactivate the kv cache.
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2023-06-29 19:07:52 +01:00 |
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2741b39ad3
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Use broadcasted scalars for const tensors.
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2023-06-29 11:56:40 +01:00 |
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b4aab7b95f
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Put more requirements on the withdtype trait.
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2023-06-29 11:37:42 +01:00 |
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c9c468e1aa
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Use Map2 for binary ops.
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2023-06-29 10:09:15 +01:00 |
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83c7d660ca
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Add Map2.
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2023-06-29 10:05:06 +01:00 |
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367170da45
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Also use Map1 for embedding.
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2023-06-29 09:45:27 +01:00 |
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8ad03a5fb6
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Use Map1 on unary ops.
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2023-06-29 09:37:38 +01:00 |
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fff13dbb4e
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Factorize the kernel naming scheme.
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2023-06-29 09:29:59 +01:00 |
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d3c7b0d168
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Use Map1 for sum.
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2023-06-29 09:27:07 +01:00 |
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122e334d0c
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Simplify the pattern matching logic in the cuda backend.
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2023-06-29 09:21:11 +01:00 |
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eaa3ce359e
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Cosmetic change.
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2023-06-28 22:02:23 +01:00 |
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1328b5cb20
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Factor some code out.
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2023-06-28 21:56:44 +01:00 |
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c583ee0f2c
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Add map2.
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2023-06-28 21:38:01 +01:00 |
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46c07b924c
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Tweak some comment.
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2023-06-28 21:10:54 +01:00 |
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2ae368e98e
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Switch from a macro to a trait to make things more generic.
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2023-06-28 21:06:56 +01:00 |
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6c9e6b5a99
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Get the cuda tests to pass.
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2023-06-28 15:53:23 +01:00 |
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3f0d9fbb25
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Adapt the cuda bits.
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2023-06-28 15:43:03 +01:00 |
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cca699be6c
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Fix some cpu issue.
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2023-06-28 15:09:15 +01:00 |
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1c755c0e5b
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Remove some todos.
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2023-06-28 14:33:06 +01:00 |
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caafef6cc1
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Get the cpu tests to run.
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2023-06-28 14:32:02 +01:00 |
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14449ff80c
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Get the cpu backend to compile.
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2023-06-28 14:12:38 +01:00 |
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54a6c40f27
|
Propagate the changes on the cpu backend.
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2023-06-28 14:00:49 +01:00 |
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303b853098
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Propagate the layout refactoring.
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2023-06-28 13:42:23 +01:00 |
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30b355ccd2
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Simplify the narrow implementation.
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2023-06-28 13:09:59 +01:00 |
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c1bbbf94f6
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Start refactoring the stride.
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2023-06-28 12:57:30 +01:00 |
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7938d2b848
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Add the grad for narrow.
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2023-06-28 10:46:00 +01:00 |
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615196e7be
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Add more gradients.
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2023-06-28 09:59:52 +01:00 |
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1ce3843cab
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Add the relu op.
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2023-06-28 09:38:54 +01:00 |
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19183b8e4f
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Factor out the gemm bits.
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2023-06-28 08:51:13 +01:00 |
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